Beyond the GPU: What the AI Infrastructure Buildout Means for the Real Economy

From compute bottlenecks to industrial consequences — where value may actually concentrate through 2030 Series: AI Compute Supply Chain | Part 5 of 5 Author:* Po-Sung(Sinclair) Huang |For the past four articles in this series, I have written about CoWoS, HBM, ABF substrates, SEC filings, and the fault lines that could eventually crack today’s moats. On the surface, that may look like a semiconductor series. It is not. What these articles really reveal is something larger: AI is no longer just a software story, and no longer just a model race. It is becoming an industrial system — one that depends on power, cooling, capital expenditure, advanced packaging, memory bandwidth, substrate materials, qualification cycles, and the physical discipline of manufacturing scale. ...

April 11, 2026

The Bottleneck Nobody Is Pricing In: Where AI Compute Really Breaks

Every layer that looks solved hides another constraint beneath it. §1 The Illusion of Infinite Compute The headlines say NVIDIA is winning. The hyperscalers are spending. The models are getting bigger. But the real question is not where demand is going. It is where compute, physically, can still be built fast enough to meet it. The harder answer requires tracing the full physical stack — from silicon wafer, through memory stack, through packaging interposer, through substrate material — and asking at each layer: can this actually scale at the speed the demand curve requires? ...

March 21, 2026

Infrastructure-Led Leading Indicators in Technology Investment Cycles: Evidence from the Semiconductor Industry

Huang, Po-Sung (Sinclair) (2026) | SSRN Working Paper No. 6285318 Posted: February 22, 2026 | Under Review This paper examines infrastructure-based leading indicators as predictive signals for technology investment cycles, with empirical evidence from the semiconductor industry. The analysis demonstrates how physical infrastructure constraints precede and predict shifts in capital allocation patterns across the semiconductor value chain. View on SSRN → Note: This is a preprint under peer review. All data collection, statistical analysis, results, and interpretations are the author’s own.

February 22, 2026